A 60-GHz vector summing phase shifter with digital tunable current-splitting and current-reuse techniques in 90 nm CMOS

A 60-GHz vector summing phase shifter has been implemented in 90-nm CMOS. Using digital tunable current-splitting technique with π-type LPF and T-type HPF, a quadrature adjustable amplitude generator is developed to improve insertion loss and adjust quadrature signals' amplitudes. It has a high Q-factor passive I/Q signal network with wide phase range. In addition, a balun based current-reuse technique is applied to further reduce power consumption. The total consumed DC current is 11 mA under 1.8 V VDD. At 60 GHz, the phase shifter with an output balun (with loss of 1.6 dB) achieves tested gain of −0.4∼2.5 dB. From 57 to 64 GHz, The measured RMS gain error and RMS phase error with phase calibration are 0.75∼1.6 dB and 2.3°∼7.6°, respectively.