Optimizing Pin Assignment and Escape Routing for Blind-via-Based PCBs

Pin assignment and escape routing are two closely related problems and it is desired to consider routability during pin assignment for package-board co-design. During pin assignment and escape routing, differential pairs and blind-via usage are two major factors to be considered in modern printed circuit board designs. However, most previous works only target on either differential pairs or blind-via usage but cannot handle both of them simultaneously. In this paper, we propose the first package-board co-design method to optimize the pin assignment and escape routing in the presence of differential pairs and blind-via usage for grid pin array. Experimental results show that our package-board co-design flow can achieve wirelength improvement and reduce the number of layers required compared with competitive baseline flows.