Standby leakage current reduction in a 180nm EEPROM process technology

Stand-alone Electrically Erasable Programmable ROM (EEPROM) are widely used in industrial, automotive and portable consumer applications. Requirements for high density EEPROM have been steadily increasing in recent years. As deep submicron nodes are used to achieve highly dense bit-cells, the propensity for process-induced defects associated with compact isolation rules and architecture also increase. This study involves an STI-based, stacked gate EEPROM cell with nearly 180A Oxide-Nitride-Oxide (ONO) inter-poly layer coupled with a 95A tunnel oxide. The peripheral logic circuitry comprises of two CMOS voltage options - 18V (HV) and 1.8V/ 5V (LV). Shallow trench isolation (STI), widely used at and below 180nm, and associated processing is known to significantly contribute to generation of crystal defects. These defects are primarily induced through local mechanical stresses generated from STI sidewalls and their interaction with the various diffusion oxidation processes. These crystal defects on intersection with source-drain junctions and/or transistor channels contribute to excessive standby leakage current. EEPROMs are usually subject to stringent standby leakage requirements. Specifically, for the technology under study, standby leakage in excess of 150uA-200uA was initially observed vs. a max product leakage requirement specification of 1 uA. This investigation describes multiple approaches to resolving the Isb issue. First, a novel, local oxidation approach was taken to grow the thick oxide through a `nitride-protect' scheme. In this approach each gate in the dual gate process is independently grown with the sole purpose of local stress confinement and mitigation. This differs significantly from the traditional grow-etch-grow (GEG) approach. Further reduction in leakage was achieved through reduction in source/drain junction implant damage which contributed to channel leakage in Si under stress. This was achieved through the use of graded drain engineered through P and As implant vs. a single As implant scheme which induced higher damage. By implementing these improvements, STI and implant related defects were eliminated and standby leakage was limited to <; 500nA.