Effect of AlN Spacer Layer Thickness on Device Performance of AIInN/AlN/GaN MOSHEMT

In the present work, we have analyzed the influence of AlN spacer layer thickness (ts) on the device performances of a 120-nm gate length AlInN/AlN/GaN MOS-HEMT device, using 2D Sentaurus TCAD simulation. A hydrodynamic model with due consideration of interface traps is used for the simulations. Due to the high value of the two-dimensional electron gas (2DEG) density and mobility in the AlInN/AlN/GaN MOS-HEMT device, a very high drain current (0.004 A/μm) density is achieved. Simulation of major device performance parameters such as Tran conductance (gm), cutoff frequency (ft) and total gate capacitance (Cgg) have been done for ts ranging from 0.5 nm to 2 nm. We have also optimized the spacer layer thickness for obtaining the maximum device performance.