Optimization of STI oxide recess uniformity for FinFET beyond 20nm

In the process of the FinFETs, shallow trench isolation (STI) oxide recess is very critical to fin height control which has significant impact on the electrical performance of device. In this work, void free STI gap filling process has been demonstrated with process optimization. STI CMP uniformity for both global and local areas has been studied. STI oxide shape and recess uniformity have also been evaluated with different oxide recess methods. Good STI oxide profile and uniformity of STI oxide recess have been achieved through above process optimization.