Silicon CMOS compatible in situ CCVD growth of graphene on silicon nitride

In this paper we report on the possibility of the silicon CMOS compatible fabrication of graphene field effect transistors on a silicon nitride high-k dielectric. For this purpose the catalytic chemical vapor deposition, which has already been approved to work on SiO
₂
surfaces [1], is used to grow graphene. First electrical results indicate a bilayer graphene with an on/off current ratio of 10
³
to 10
⁴
, which can be achieved with lower threshold voltages. A greater on/off current ratio may be possible, as the off current is degraded through gate leakage current.