Analyses of Surface and Interfacial Layers in Polycrystalline $\hbox{Cu}_{2}\hbox{O}$ Thin-Film Transistors

Effects of low temperature (300
^°
C) annealing on Cu
₂
O films were investigated by analyzing the film stacking structures with photoemission spectroscopy, X-ray reflectivity spectroscopy and spectroscopic ellipsometory in relation to p-channel TFT characteristics and possible origins of trap states. The Hall mobility of optimum Cu
₂
O films was 2.1 cm
²
/(V·s); however, the bottom-gate Cu
₂
O TFT exhibited a much lower field effect mobility of the order of 10
^-4
cm
²
/(V·s) and an on/off drain current ratio of 10
³
. This work detected a surface layer and an interface layer in the Cu
₂
O/ SiO
₂
samples, i.e., the surface layer included the 2+ state of Cu ions that would form subgap hole trap states at the back channel region. In addition, the low-density layer at the Cu
₂
O-SiO
₂
interface would produce extra interfacial trap states.