Data preprocessing with FPGA in multiple channel data acquisition system

In the multiple channel data acquisition system of large physics experiments it is necessary for us to preprocess the data in front-end electronic system to arrange the data into specified orders. The aim of our research was to implement the data arrangement using FPGA in real time which was more efficient than implementing it in the software. The reordering process essentially conducted a matrix transpose since the data usually stored as a two dimensional matrix depended on time and channel number. In this paper, we mainly discussed algorithms of full matrix transpose and sparse matrix transpose that were generally used in large physics experiments. In the case of full matrix transpose, the input data were jump-written to a calculated address location in the memory and read out in sequence from the memory. However, in the case of sparse matrix transpose, the input data were written to the memory in sequence with its position we referred to when jump-read the data out of the memory. Each position of the input data was inserted into a list including the entire data ordered positions. FPGA logic modules were designed according to the two algorithms and a simulation was conducted using the data form of data frame in seismic prospecting system as an example for full matrix transpose and using the data form of HPTDC as an example for sparse matrix transpose. Results indicated that the modules could successfully achieve matrix transpose in real time within a few latency in the both case of the full matrix transpose and the sparse matrix transpose.