A K-band CMOS power amplifier with FET-type adaptive-bias circuit

A K-band PA using adaptive-bias technique is developed in 0.18µm CMOS technology. By means of controlling the proposed FET-type variable resistor, the proposed adaptive-bias circuit can dynamically adjust the gate bias of the PA according to the input signal with low insertion loss at K-band. This PA has a peak PAE of 14.9% while the output power is 15.8 dBm at 24 GHz, and the P
1dB
is 13.9 dBm with 14% PAE. The PAE is 8.7% at the power 6-dB back-off from P
1dB
. The PA with adaptive-bias function demonstrates a similar ACPR performance and saves 37% dc power at quiescent state compared with the PA under fixed class-A bias.