A novel envelope-termination load-pull method for ACPR optimization of RF/microwave power amplifiers

A novel load-pull method for envelope-termination characterization is presented. The method enables the source and load envelope terminations to be easily evaluated to further optimize the linearity/efficiency tradeoff of RF/microwave power transistors used in digital wireless communication systems with time-varying envelopes. Results are presented for a 53 mm low-voltage LDMOS transistor at 850 MHz. It is shown that the optimal envelope termination may in general be complex, in contrast to the commonly held belief that the envelope-termination must be approximately zero. A simplified Volterra series analysis is used to qualitatively explain how the envelope termination impacts linearity.