Low Power III–V InGaAs MOSFETs featuring InP recessed source/drain spacers with Ion=120 µA/µm at Ioff=1 nA/µm and VDS=0.5 V

We report InGaAs-channel MOSFETs using recessed InP spacer layers in the regrown source and drain. By replacing narrow band-gap InGaAs with wide band-gap InP within the high-field region near the drain end of the channel, band-to-band tunneling (BTBT) leakage is significantly reduced. A 30 nm gate length device using InP spacers shows a minimum I
off
∼60 pA/µm, approximately 100∶1 smaller than a similar device using InGaAs source/drain spacers. A FET using InP spacers, with 45 nm gate length, and with a 3 nm ZrO
2
gate oxide shows I
on
=150 µA/µm at I
off
=1 nA/µm and V
DS
=0.5 V. The low off-state leakage current observed with InP source/drain spacers makes InGaAs MOS technology viable for low-power logic.