Reduction of base-collector capacitance in InP/InGaAs HBT's using a novel double polyimide planarization process

The parasitic base-collector capacitance (C/sub BC/) in InP/InGaAs heterojunction bipolar transistors (HBTs) has been reduced using a novel double polyimide planarization process which avoids damage of the extrinsic base layer. The extrinsic base metal outside the base-collector mesa is placed on the polyimide by polyimide coating and etch-back to the base layer. We obtained f
_T
of 81 GHz and f
_max
of 103 GHz with a 2×10 μm emitter. Performance comparison between two devices with the same area of 2×2 μm but with different base-collector mesa area showed 56% reduction of C/sub BC/ and 35% increase of f
_T
and f
_max
.