An optimized layout with split bus capacitors in eGaN-based integrated DC-DC converter module

This paper carefully discusses the interaction between the bus capacitors and the parasitic inductances in an integrated DC-DC converter module. The design principles of the bus capacitors are presented and validated by simulation results. In addition, an optimized PCB layout with split bus capacitors is proposed for enhancement-mode Gallium-Nitride (eGaN) transistors based integrated DC-DC power converter module. The power loop inductance is about 0.2nH extracted by Maxwell 3D simulation, which is reduced by 50% than that of the reported best layout. The results are validated by a buck converter operating at input voltage of 12V, output voltage of 3.3V, output current of 8A, and switching frequency of 1MHz.