Performance analysis of DA based adaptive FIR filter using FPGA

In this paper, the performance is analyzed based on operating speed, area and memory requirement for the least mean square (LMS) adaptive finite impulse response (FIR) filter using distributed arithmetic (DA). DA technique performs the convolution operation by replacing multipliers with look up tables that result in low resource utilization and high throughput. The throughput and resource utilization factors are related with the number of taps in the DA base unit and these DA base units are required to reduce the memory size and to provide fast updating of memory contents. In this paper, we also analyzed the effect of the number of taps in DA base unit on the memory usage and operating speed of the adaptive FIR filter design.