Clock gating -A power optimization technique for smart card

Power consumption is a key issue of smart card whose power is supplied by induced currents. This paper has described the principle of the clock gating technology which is used to optimize power consumption of the smart card in RTL level. It turns out that the total power consumption has been reduced by 40% using the proposed method, without obvious increase in area. The smart card using the clock gating technology is verified and tested in 180nm process.