4H-SiC MOSFETs utilizing the H2 surface cleaning technique

The H
₂
cleaning technique was examined as the precleaning of the gate oxidation for 4H-SiC MOSFETs. The device had a channel width and length of 150 and 100 μm, fabricated on the p-type epitaxial layer of 3×10/sup 16/ cm/sup -3/. The gate oxidation was performed after the conventional RCA cleaning, and H
₂
annealing at 1000/spl deg/C. The obtained channel mobility depends on the pre-cleaning process strongly, and was achieved 20 cm
²
/N s in the H
₂
annealed sample. The effective interface-state density was also measured by the MOS capacitors fabricated on the same chips, resulting 1.8×10/sup 12/ cm/sup -2/ from the photo-induced C-V method.