An optimization model of the input current for a variable input voltage in CMOS AC/DC converter

An optimization model of the input current for a variable input voltage in CMOS AC/DC converter is proposed in order to achieve regulation control of an AC/DC converter. An input current model of CMOS converter is obtained by applying an average method in converter circuit over one's switching period. This model is implemented in Pspice circuit simulation tool to verify an averaged model of the input current. The results show that the input current exhibits an increasing response to input voltage variation from 0.3 to 1.5 V. The validity of the proposed steady-state model is verified by the given simulation results for a specified design of CMOS converter. A good agreement is obtained between steady-state model and simulation results.