Investigation of HBT layout impact on fT doubler performance for 90nm SiGe HBTs

Peak f
T
of 660GHz is reported for HBT f
T
doubler designs in IBM 90nm SiGe BiCMOS technology 9HP. This high performance f
T
doubler utilizes a longer HBT for output stage compared to the input stage HBT (length ratio 2:1) resulting in improved transconductance and lower thermal resistance. The impact of HBT layout on the circuit performance and trade-off between thermal resistance and f
T
is also investigated. f
T
doubler circuit can be used as a single transistor in several circuit applications like A/D converters and broadband circuits where higher performance is desired.