A high-speed BiCMOS switched-current track-and-hold circuit

A fully differential switched-current mode twice interleaved track-and-hold circuit has been integrated in a 0.8 /spl mu/m f/sub T/ 12 GHz BiCMOS technology. Used as a single channel T&H circuit (not interleaved), measurements have shown a THD of -58 dB (9,3 bits) for a sampling frequency of 100 MHz under Nyquist condition. Furthermore, in the same operation mode, the circuit is also able to sample a 20 MHz FS input signal at 200 MHz while keeping a THD of -65 dB. The switched-current memory cell consumes 41 mW (excluding input and output stages) at 5 V. Operation in a twice interleaved mode is also presented.