Computational field programmable architecture

This paper introduces a new field-programmable architecture that is targeted at compute-intensive applications. These applications are important because of their use in the expanding multi-media markets in signal and data processing. We explain the design methodology, layout and implementation of the new architecture. A synthesis method has also been developed with which we have mapped several circuits to the new architecture. In this paper, we show that the invented architecture is more area-efficient than traditional FPGAs by a factor of more than 2.5 times.