A Clock Synchronization for M-Sequence-Based Ultra-Wideband Systems

This paper presents a cross-correlation-based synchronization architecture between the clock of the receiver and the transmitter of ultra-wideband systems. The proposed architecture is based on M-sequence signals instead of the conventional impulse signals. The M-sequence generator and the analog correlation circuit are fabricated on-chip using a low-cost 0.25 μm 95 GHz fmax SiGe-HBT-BiCMOS process technology. The chip is mounted on a printed circuit board (PCB) with a commercial voltage-controlled oscillator (VCO). The synchronization scheme obtains the clock information with a received signal as low as 2 mV peak to peak and minimum input power of -52 dBm at 10 GHz. The power spectrum measurement of the locking VCO shows a low phase noise of -69 dBc/Hz at 1 kHz offset and an rms jitter of 0.93 ps for a 10 GHz frequency and a bit rate of 20 Gb/s. The achieved mismatch between the received and the reference signals is a maximum of 25 ps at signal bandwidth of 10 GHz. The proposed clock recovery system acquires the clock information correctly with different materials placed in the transmission channel.