Adaptive Technique for Overcoming Performance Degradation Due to Aging on 6T SRAM Cells

The threshold voltage drifts induced by positive bias temperature instability (PBTI) and negative bias temperature instability (NBTI) weaken nMOS and pMOS, respectively. These long-term aging threshold voltage drifts degrade SRAM cell stability, margin, and performance. This paper presents a low area overhead adaptive body bias (ABB) circuit that compensates BTI aging effects and also improves performance of an aged SRAM cell. The proposed circuit uses a control circuit and word line voltage to control the voltage applied to the body of 6T SRAM cell's transistors such that the BTI effect dependence of threshold voltage is reduced. In the worst case, the proposed ABB reduces the HOLD SNM degradation by 6.85%, the READ SNM degradation by 12.24%, the WRITE margin degradation by 2.16%, the READ delay by 28.68%, and the WRITE delay by 32.61% compared to the conventional SRAM cell at 108 s aging time.