A statistic based time skew calibration method for time-interleaved ADCs

In this paper, a statistic based time skew calibration method for time-interleaved ADCs is presented. By comparing the mean value of the multiplication of signals in two adjacent channels, the time skew can be estimated. Subsequently, a capacitor array based digitally controlled delay block placed in sampling clock path is adopted to compensate the time skew. In addition, the precision of calibration is further improved through using a monotonic small capacitor array. In a 4-channel 1GS/s 12-bit TI-ADC system, the spurious free dynamic range (SFDR) can be improved to 77.5dB with 0.25ps LSB in the digitally controlled delay block.