FPGA implemented multi-level IFPWM power coding for class-S PA in an all-digital GHz LTE transmitter

This work presents a new efficient multi-level intermediate frequency pulse width modulation (ML-IFPWM) power coding algorithm for switch-mode power amplifier. The merits of high power coding efficiency with distortion correction function are demonstrated by a FPGA implemented digital front end. Measurement results have shown power coding efficiency greater than 45%. To our knowledge, this is the firstly reported implemented discrete-time domain 3-level power encoding approach with 5-MHz LTE signal at RF carrier frequency around 2 GHz. This can be used to generate multi-level digital pulse-train for advanced class-S PA in cellular digital base stations.