A 50-MHz clock generator with voltage and temperature compensation using low dropout regulator

This paper presents a clock generator featuring a feedback temperature and voltage compensation circuit and low dropout regulator circuit on-chip capable of constraining frequency variation to 3.49 %. The inclusion of an OPA, MOS transistors and resistors eliminates the need of large BJT devices to reduce the area penalty and achieve low power consumption. Particularly, a negative feedback temperature compensation bias circuit utilizes only a MOS transistor and a resistor to improve compensation capability. The proposed design is implemented using TSMC 0.18 μm CMOS process followed by simulation in the temperature range between of 0
^o
C to 100
^o
C. The post-layout-extracted simulation results reveal that the worst-case error is less than 2 mV with calibration, which is 72 % improvement compared with the state of art.