UTOPIA: Generic User-Level Access to the Physical Memory Address Space for IP Core Debugging and Validation on FPGA Based PCIe Extension Cards

Testing and debugging of an Field Programmable Gate Array (FPGA) based Peripheral Component Interconnect Express (PCIe) extension card require an access to its resources and the system's main memory. Both are accessible via the physical memory address space (PMAS). User-level solutions for accessing this address space exist, but are proprietary and/or limited to specific address ranges, among others. An arbitrary user-level access, e.g. for a flexible validation of an intellectual property (IP) core, is not possible. Enabling such accesses, the open source Linux tool set UTOPIA - including its concept, structure and interfaces - is presented in this paper. Further, bandwidths and latencies between user-level applications and the PMAS are measured and evaluated.