Current collapse in GaN heterojunction field effect transistors for high-voltage switching applications

We have investigated current collapse in GaN heterojunction field effect transistors (HFETs) for high voltage power switching applications. With a novel technique in which the gate and drain pulses are controlled independently, we have measured the current collapse under various switching conditions. We found that the current collapse improves under hard switching in which the loadline passes through high current and high voltage area. This was attributed to holes that are generated through impact ionization and compensate trapped electrons at device surface. We show that optimized field plate and surface treatment significantly improves the current collapse for high voltage GaN HFETs.