Performance-Occupation trade-off examination in custom processor design

Trade-off between execution time and resource occupation arise in all kinds of digital system designs. Here we present such relation for FPGA-based custom processor design. Usually, the optimal tradeoff is directed by device sizing on all scales of the design, but for FPGA device, as predefined hardware platform, it is more focused on comparison of existing platforms organizations. The customization of processor architecture as a point of design performance improvement is usually focused on selection of parameter set that governs the most the design characteristics. In this paper, the focus is on processor architecture datapath with predefined design template and relationship of its structure to final FPGA implementation it maps to. For purpose of evaluation of multiple design at the same time, the appropriate software flow is applied to construct the design space based on constraining of datapath functional units operation types. The data are collected throughout the whole design flow starting from input control and data flow characteristics of the application and ending with FPGA implementation data. The analysis of the design flow showed dependence of final implementation on datapath structure and its components complexities.