Hierarchical layout design of power SiGe HBTs

We discuss the influence of parasitic network resulting from the interconnection layout on power performance of SiGe power HBTs (Heterojunction Bipolar Transistor) under RF(Radio Frequency) operation conditions. It is found that the differences in quiescent operating point between the combining units are caused by the distribution of parasitic interconnection resistances and that the output power of the SiGe power HBTs will sooner or later get smaller than expected in proportion to device size because of this heterogeneity. By analyzing the simulation results we've got, a hierarchical layout design of high-power devices is proposed and verified practically by designing, fabricating and characterizing several SiGe HBTs.