Direct Cu plating of high aspect ratio through silicon vias (TSVs) with Ru seed on 300 mm wafer

In this paper, physical and electrical results of full wafer direct Cu plating of 2×40 µm TSVs with thin Ru seed are presented. Physical vapor deposition of about 100 nm Cu in the field is shown to improve plating non-uniformity across the structured wafer. TSV plating using Atotech's TSV III chemistry results in bottom-up growth with strong TSV sidewall suppression and void free TSV fill. Early results for in-line electrical test and voltage ramp dielectric breakdown reliability testing are discussed.