Mechanical Characteristics of Thin Die/Wafers in Three-Dimensional Large-Scale Integrated Systems

A thickness value of less than 50 μm for die/wafers is a must meet criteria in 3-D large-scale silicon device integration, in order to reduce interconnect lengths and resistive-capacitive delays. The mechanical properties of such ultra-thin die/wafers, namely, Young's modulus, hardness, etc., with respect to 1) different die thinning processes (chemical mechanical polishing, plasma etching, dry polishing, kai-dry polishing, poly grinding, ultra-poly grinding, #2000, etc.); 2) various wafer thicknesses (10, 20, 30, 40, 50, 100, and 200 μm); and 3) different wafer types (P/P+, P/P-, and wafers with internal-gettering layers) were investigated by using a nano-indenter. The mechanical characteristic data obtained for the thin die/wafers were well supported by their corresponding residual stress values (obtained by laser micro-Raman spectroscopy) and the crystal mis-orientation results (obtained via electron back-scatter diffraction). The chemically-mechanically polished ultrathin dies/wafers were found to be extremely good from the perspective of both mechanical strength and residual stress when compared to their counter parts fabricated by all other die thinning methods considered in this study.