On-chip quasi-static floating-gate capacitance measurement method

An accurate interconnect capacitance parameter measurement technique is described. The technique is based on measurement of a capacitively divided DC voltage by means of a source follower stage integrated in the test structure. Determining of dielectric thickness as well as interconnect capacitance parameters using this technique in combination with special test patterns is described. The method shows good agreement with two-dimensional computer simulations. The technique is proven to be practical, reliable, and suited for use with manual and automatic parametric test equipment.<
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