A Low Cost, Low Power Video Processor For High Quality Motion Estimation In Mpeg-2 Encoding

A novel architecture dedicated to perform user-defined motion estimation algorithms on MPEG-2 CCIR 601 sequences is presented. The proposed MIMD processor exposes software programmability at different levels allowing the user to define his own searching strategy and combine multiple chips in Master/Salve configuration to meet the required processing power. Moreover post-processing of motion vectors, computation of dual prime vectors for low delay coding and selection of macroblock prediction mode can be programmed on this architecture.