Experimental Evidence Toward Understanding Charge Pumping Signals in 3-D Devices With Poly-Si Channel

Poly-Si (p-Si) channel used in 3-D Flash memory devices is the main source of degraded performance, such as the high interface state density. Charge pumping (CP) signals in the 3-D nanoscale vertical device with p-Si channel are analyzed in this paper using the variable amplitude CP technique. For the first time, it has been demonstrated experimentally that the broad CP edge is due to the threshold voltage variation in the p-Si channel caused by both the trapping in interface states and the source/drain p-n junction diffusion, and their impacts can be separately evaluated. Hot carrier stress in the tunneling FET operation modes and statistical analysis are used to provide supporting evidence.