Efficient method for controlling electric power by automated monitoring system using FPGA

Power is considered to be as major concern in today's technology. Several research works are carried in order to minimize the usage of electric power. In this paper, an efficient automated power saving system was designed using Spartan-6 FPGA for minimizing the power wastage in educational institutions. Mostly, the students forget to switch off the electrical appliances, when they leaving out of classroom. The power wastage can be completely eliminated by using this Automated Power Saving System. The system is developed by VHDL and it is implemented using Wipro Mission10x UTLP Board.