Performance comparison of filter circuits based on two different current conveyor topologies

This paper investigates the effect of two different second generation current conveyor (CCII) topologies on the behaviour of low pass, high pass and band pass filters. One of the current conveyor topology is based upon CMOS inverters and the other realization is based on translinear loop. 3-db bandwidth, Total Harmonic Distortion (THD) and output noise are used as comparison parameters. Simulation results show that THD of CMOS inverter's based filters is lesser than that of the translinear loop based CCII filters. The former topology also enjoys better noise throughout its bandwidth against the latter one. All the simulations are done on PSPICE using typical BSIM3V3 0.35μm CMOS process parameters.