Discrete Dopant Impurity Scattering in $p$ -Channel Silicon Nanowire Transistors: A $k.p$ Approach

In this paper, we present the results of a numerical study on the influence of discrete dopant atom distribution and crystal orientation on the electrical characteristics of p-channel silicon nanowire-based transistors using 3-D quantum simulations. The valence band was modeled employing a three-band k.p Hamiltonian with optimized Lüttinger parameters, while the device characteristics were obtained by modeling hole carrier transport through a self-consistent solution of Poisson's equation and the nonequilibrium Green's function formalism. Simulation of various discrete impurity configurations show that impurities located near the center of the channel region have the greatest impact on threshold voltage. It is shown that the effect of donor-like impurities on device threshold voltage is virtually independent of the nanowire's crystallographic orientation, whereas discrete acceptor-like impurities induce smaller threshold voltage shifts in nanowire transistors oriented along the [110] and [111] directions; thus suggesting that the devices oriented along these directions would be relatively less sensitive to the effects of unintentional impurities on threshold voltage.