Design considerations for integrated continuous-time chaotic oscillators

This paper presents an optimization procedure to choose the chaotic state equation which is best suited for implementation using Gm-C integrated circuit techniques. The paper also presents an analysis of the most significant hardware nonidealities of Gm-C circuits on the chaotic operation-the basis to design robust integrated circuits with reproducible and easily controllable behavior. The techniques in the paper are illustrated through a circuit fabricated in 2.4-/spl mu/m double-poly technology.