Reasonable circuit analysis considering comprehensively reliability and variability

Circuit design in advanced CMOS technologies brings significant reliability and variability challenges. It is necessary to effectively handle the delay variation caused by various factors. In this paper, we make good use of the reliability models that have been proposed until now and present new models for simple and practical use. Then, we present an approach for circuit analysis that comprehensively considers reliability and variability. It includes time-dependent factors such as time-dependent dielectric breakdown (TDDB), bias temperature instability (BTI), hot-carrier injection (HCI), electromigration (EM), and random telegraph noise (RTN). Finally, in the analysis of a circuit with a gated clock, we demonstrate that analysis considering both reliability and variability is very important.