Enhancement of hardware modular multiplier radix-4 algorithm for fast RSA cryptosystem

Algorithms and architectures for performing modular multiplication operations are important in residue number system and cryptography. In this paper a new algorithm of Radix-4 MSB modular multiplier using 4-2 compressor is presented. The recoding rules for the radix-4 Booth's algorithm are used to reduce the number of partial products and improve the total hardware area and time. This new algorithm avoided a carry store and feedback in some algorithms presented in the literature. It is simulated and implemented using MatLab and VHDL.