New strategies for fast ADC circuits

A modified strategy for successive approximation is discussed. A four-bit multilevel converter of one-cycle conversion time is first described. Approximation is carried over at two levels handling two bits at a time. This results in a relative speed improvement of five times over the conventional method for the four-bit scheme. The four-bit multilevel converter is modified for flash conversion. Experimental results for the four-bit flash converter are presented. Eight-bit converters, as extensions of the four-bit schemes presented, are also proposed. Practical results of the four-bit multilevel flash converter display good linearity. The worst-case conversion time was found to be about 650 ns.<
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