A 400MHz – 1.6GHz fast lock, jitter filtering ADDLL based burst mode memory interface

A fast lock DLL based 800Mb/s to 3.2 Gb/s burst mode memory interface is implemented. The DLL employs a two-step TDC during power up from 0mW to lock within 3 cycles with residual error <; 33 mUI. Following initial lock, the DLL operates closed-loop to compensate for V,T drift consuming 6mW @ 1.6GHz. In addition the DLL filters high frequency input jitter and corrects 20% DCD without additional correction.