Fail-safe interfaces for VLSI: theoretical foundations and implementation

This paper presents the design of strongly fail-safe interfaces which transform binary signals, generated by a system with error detection capabilities and eventually with fault-tolerant capabilities, into fail-safe signals, that is to say, into signals which, in the presence of failures, will be either correct or safe. The strongly fail-safe property is achieved by means of concurrent checking techniques. The interest of these interfaces is that they can be implemented in VLSI, while the conventional fail-safe interfaces require using discrete components. A formal theory of fail-safe systems is developed to guide the implementation of the new solutions.