Ubiquitous computing platform via hardware assisted ISA virtualization

We propose a ubiquitous computing platform that supports multiple industrial instruction set architecture (ISA) standards via hardware assisted ISA virtualization. The proposed architecture features the following innovations: 1) It employs an efficient hardware assisted dynamic binary translation approach, 2) It implements a native semantically rich instruction set architecture that achieves when translating user level code one-to-one mappings for RISC ISAs such as ARM and a minimal one-to-multiple mappings for CISC ISAs such as Intel X86, and 3) It tackles, without compromising performance or energy efficiency and without requiring recompilation of software or rewriting of compilers, the issue of software portability across different ISA platforms through unhosted hardware assisted ISA virtualization. After introducing a metric to compare the semantic difference between an emulated virtual ISA and the native platform ISA, we present performance results as well as measurements of the effectiveness of our proposed platform when running ARM and X86 binaries.