A 0.7 V-to-1.0V 10.1 dBm-to-13.2 dBm 60-GHz power amplifier using digitally-assisted LDO considering HCI issues

A 60-GHz power amplifier (PA) with consideration of hot-carrier-induced (HCI) degradation is presented. The supply voltage of the last stage of the PA (V
_PA
) is dynamically controlled by an on-chip digitally-assisted low drop-out voltage regulator (LDO) to alleviate HCI effects. The PA is fabricated in a standard 65-nm CMOS process with a core area of 0.21 mm
²
, which provides a saturation power of 10.1 dBm to 13.2 dBm with a peak power-added efficiency (PAE) of 8.1% to 15.0% for PA varying from 0.7V to 1.0V at 60 GHz, respectively.