A chip-area-efficient CMOS low-dropout regulator using wide-swing voltage buffer with parabolic adaptive biasing for portable applications

A chip-area-efficient CMOS low-dropout regulator (LDR) based on a wide-swing voltage buffer is proposed for battery-powered portable applications. By using a low-threshold PMOS with a novel parabolic adaptive biasing technique in the buffer, the voltage overhead is dramatically reduced, allowing a small-sized power transistor that works in the linear region at heavy load to be used while still maintaining a large load range and a tight regulation. The operation principle and the stability issues of using low-ESR output capacitor without any compensation capacitors are discussed. The proposed LDR has been fabricated in a standard 0.13-μm CMOS process, and highvoltage devices are used for the power transistor and in the error amplifier to accommodate for the Li-Ion battery voltage range. With 0.2V dropout voltage and 200 mA maximum load current, the measured load regulation is 85 μV/mA while the occupied active chip area is only 0.045mm
²
.