Novel Honeycomb SOI Structure with Low Parasitic Capacitance for Human-Sensing Accelerometer

To realize extremely low-power consuming sensor systems, a SOHI (Silicon on Honeycomb Insulator) wafer, which has ultra-small parasitic capacitance, is proposed and an accelerometer is fabricated to demonstrate use of the technique. In case of using a low-power-consumption switched capacitor measurement circuit, parasitic capacitance decreases sensor sensitivity dramatically. The concept of the SOHI wafer is a special SOI (Silicon on Insulator) wafer with the buried SiO
₂
layer replaced with a honeycomb-shaped SiO
₂
thick layer (20 Ým thick) to reduce the parasitic capacitance. In this paper, two types of SOHI wafer, which could reduce the parasitic capacitance to about 21% and 2% of typical SOI wafers, respectively are proposed. On a trial production, the structure of a prototype three-dimensional accelerometer is fabricated. By demonstrating the application of sensor fabrication, the SOHI wafer is shown as a useable material as the base substrate. Also, the ability to realize the accelerometer with low parasitic capacitance by using the SOHI wafer is demonstrated.