A Versatile Method for MOSFET Commutation Analysis in Switching Power Converter Design

This paper discusses a novel method for the analysis of MOSFET commutations and the investigation of related losses and spike current issues in the switching power converter (SPC) design. The synchronous rectification switching cell (SRSC) configuration is considered for the investigation, which is used in the high-frequency high-efficiency (H
$^{2}$
EF) SPC design. The proposed method is aimed at providing an effective tool for quick feasibility investigations and comparative evaluations among design solutions using different MOSFET combinations for the design of H
$^{2}$
EF SPCs. The method allows us to use nonlinear models of interelectrode MOSFET capacitances and adopts a novel numerical technique specifically developed to solve the SRSC model ensuring robust and fast simulations. Capacitive pulsating currents circulating through the MOSFETs and the SPC during commutations can be analyzed in detail by using the proposed method. Different examples are discussed to show how MOSFETs characteristics and operating conditions may affect switching losses, because of the pulsing currents circulation through the SPC.