Evaluation of de-embedding technique accuracy depending on de-embedding patterns for CMOS circuits up to 110 GHz

The accuracy of de-embedding techniques depending on de-embedding layout patterns has been verified by experiment up to 110 GHz for CMOS circuits. The accuracy of the measured characteristics is affected significantly by the de-embedding procedure, which has been done for the raw measurement data. The de-embedding patterns and some transmission lines (TL) as test device were designed and fabricated using 40 nm CMOS process. From the experiment results, it was confirmed that each characteristic of the TL, such as propagation constant and characteristic impedance, has a different suitable de-embedding pattern to set a reference plane at a different desired position.