Benchmarking and improving III-V Esaki diode performance with a record 2.2 MA/cm2 peak current density to enhance TFET drive current

Recently, III-V tunneling field effect transistors (TFET) for low voltage logic applications (<0.5V) have gained attention with the demonstration of sub-60 mV/dec. subthreshold slopes [1]. A key outstanding issue with TFETs is limited drive currents, due to non-optimized carrier tunneling. With that issue in mind, the aim of this work is to map III-V Esaki tunnel diode (TD) performance to engineer TDs with ultra high current densities while maintaining large peak-to-valley current ratios (PVCR). This work describes the most comprehensive experimental benchmarking of TD performance reported, including (i) GaAs, (ii) In
0.53
Ga
0.47
As, (iii) InAs, (iv) InAs
0.9
Sb
0.1
/Al
0.4
Ga
0.6
Sb, and (v) InAs/GaSb as a function of doping and effective tunnel barrier height. These results confirm that heterojunctions (bandgap engineering) and doping will enhance peak (J
P
) and Zener current densities beyond homojunction TDs [3], to a record 2.2MA/cm
²
(J
P
) and 11 MA/cm
²
(@ −0.3 V), laying the fundamental groundwork for a III-V TFET at the 7 nm technology node.